Combinational Circuits Solved Questions

Question 1

Design a combinational logic circuit with three inputs, and the output is at logic 1 when more than one input is at logic 1.

Solution.

To design this combinational logic circuit, we can rely directly on the truth table, extract the Boolean expression, and use algebraic simplification instead.

This circuit is known as a majority gate or majority function circuit, because the output matches whichever logic state represents the majority of the three inputs.

1. The Truth Table

Let the three inputs be A, B, and C, and the output be Y.

The problem states that Y = 1 when more than one input is at logic 1. This means the output is high when any 2 inputs are 1, or when all 3 inputs are 1.

2. Algebraic Extraction & Simplification

From the truth table, we can write down the Sum of Products (SOP) expression by looking at the rows where the output Y = 1:

We can simplify this algebraically using the laws of Boolean algebra. The key trick here is the Idempotent Law (A + A = A). Since adding identical terms doesn’t change the logic value, we can duplicate the term ABC to pair it up with each of the other three terms:

Now, rearrange the terms to group them logically:

Factor out the common variables from each group:

Using the Complement Law (X + X’ = 1), we know that (A’ + A) = 1, (B’ + B) = 1, and (C’ + C) = 1:

Final Simplified Expression:

3. Circuit Implementation

The simplified Boolean equation indicates that the circuit requires:

• Three 2-input AND gates to evaluate the product pairs (AB, BC, and AC).

• One 3-input OR gate to combine the outputs of the AND gates.

Logic Gate Configuration:

1. AND Gate 1: Inputs A and B  =AB

2. AND Gate 2: Inputs B and C = BC

3. AND Gate 3: Inputs A and C =AC

4. OR Gate: Combines all three intermediate terms to deliver the final output: Y = AB + BC + AC.

OR

To design this combinational logic circuit, we will follow a standard digital design process: derive the truth table, simplify the output logic using a Karnaugh Map (K-Map), and then sketch the final logic circuit.

This specific circuit is commonly known as a Majority Function circuit, because the output reflects what the majority of the inputs are doing.

1. The Truth Table

Let the three inputs be A, B, and C, and the output be Y.

The condition states that Y = 1 when more than one input is at logic 1 (meaning 2 or 3 inputs must be 1).

From the truth table, the Sum of Products (SOP) minterms where the output is 1 are:

Y = m(3, 5, 6, 7)

2. K-Map Simplification

To find the minimum implementation, we place these 1s into a 3-variable Karnaugh Map:

       BC
   A \  00   01   11   10
     +----+----+----+----+
   0 |  0 |  0 |  1 |  0 |  --> minterm m3 (011)
     +----+----+----+----+
   1 |  0 |  1 |  1 |  1 |  --> minterms m5 (101), m7 (111), m6 (110)
     +----+----+----+----+

By grouping adjacent 1s in pairs of two, we get three overlapping groups:

1. Group 1 (m3 and m7): A changes, B and C remain 1 =BC

2. Group 2 (m5 and m7): B changes, A and C remain 1 =AC

3. Group 3 (m6 and m7): C changes, A and B remain 1 =AB

Simplified Boolean Equation:

3. Circuit Implementation

The simplified equation tells us that we need:

• Three 2-input AND gates to generate the terms AB, BC, and AC.

• One 3-input OR gate (or two 2-input OR gates cascaded) to combine them.

Logic Gate Layout:

1. Pass inputs A and B into the first AND gate  = AB

2. Pass inputs B and C into the second AND gate = BC

3. Pass inputs A and C into the third AND gate  =   AC

4. Feed the outputs of all three AND gates into a 3-input OR gate to get the final output: Y = AB + BC + AC.

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